OCT2224W

The OCT2224W is part of the OCT2200 series of devices, targeted at wireless baseband processing for Base Transceiver Stations (BTS).

The OCT2224W is a System-on-Chip (SoC) device optimized for GSM, HSPA and LTE baseband processing. It offers impressive power-efficiency consuming less than 5 watts while serving 64 users within a range of 20 km in HSPA.

OEMs can quickly develop multi-standard basestations thanks to the modular flexiPHY  software that comes pre-integrated with the device. This software supports major 3GPP releases. Click here for details on flexiPHY .

For non-commercial cellular applications including custom waveforms, customers can use Octasic’s Opus Development Kit (ODK). This low-level SDK provides all the necessary drivers and libraries to quickly build a custom wireless product.

The OCT2224W is highly integrated. It includes high-speed network interfaces as well as on-chip RF ports making it ideal for cost efficient small cell designs.

Specifications

High-performance Multi-core DSP

  • 24 Opus2 DSP cores
  • C programmable DSP

Hardware Acceleration Blocks (HABs)

  • 6 dynamically reconfigurable Hardware Acceleration Blocks (HABs)
  • Each HAB can perform the following functions:
    •  I/FFT, I/DFT, RACH, Search, Viterbi, Turbo, and CTC

Characteristics

  • 484-pin Ball Grid Array (BGA) package, 1.0mm pitch
  • 4W typical power consumption

On-chip Functions

  • Fully secure custom booting capability
  • RF Transceiver Clock Synchronization Unit
  • Clock Synchronization Unit

Peripheral Interfaces

  • One 4x (or two 1x) Serial RapidIO Links, v1.3 compliant
  • One 1x PCIe link 2.5 Gbps, v1.1 or v2 compliant
  • Four Ethernet MACs with parallel and SGMII modes
  • Three Parallel Interface (PIF) ports. Supported protocols include:
    • JESD207 digital converter interface for RF transceivers. Multiple ports can be combined for MIMO support
    • Generic parallel interface to custom FPGA designs
  • USB 2.0 ULPI Interface. High-/Full-Speed Host
  • Flexible TDM interface
  • Flash memory interfaces for ONFI NAND or Serial NOR Flash
  • DSP Debug port
  • Universal Integrated Circuit Card (UICC) Smart Card interface
  • One Universal Asynchronous Receiver/Transmitter (UART)
  • One Generic Serial Interface (GSI)
  • One Inter-Integrated Circuit (I2C) interface
  • Configurable SPI, SSP, or MICROWIRE™ serial port
  • General Purpose I/O (GPIO) pins
  • IEEE-1149.1 (JTAGTM) Boundary Scan compatible
  • 32-bit DDR3 Memory interface

Hardware Diagram


 

Download Product Brief

Software

The OCT2224W is fully integrated with Octasic’s proprietary flexiPHY software that provides multi-standard cellular capabilities to developers.  Find out more about flexiPHY.

Key Benefits

  • A single family of devices can be used for many applications across a broad range of wireless standards and capacities
  • Lowest power fixed point DSP in the industry.
  • State-of-the-art graphical software development environment optimized for multi-core architectures.
  • Flexible multi-standard Hardware Accelerators can be reprogrammed for future standard revisions.
  • Complete integrated solution for a UMTS and LTE Small Cell BTS and Enterprise Femtocell.
  • Multiple devices can be interconnected to build a Macro BTS baseband sub-system.
  • 3 direct Radio IQ interfaces can support multiple radio interfaces separately or concurrently.

 

All Octasic devices are RoHS compliant.